1. Field of the Invention
This invention relates to the fabrication of semiconductor components and more particularly to the in-situ fabrication of semiconductor components imbedded within a substrate through a laser synthesis process.
2. Description of the Related Art
Certain ceramics, such as silicon carbide (SiC) and aluminum nitride (AlN), are known to exhibit Certain ceramics, such as silicon carbide (SiC) and aluminum nitride (AlN), are known to exhibit electrical properties ranging including insulating properties, semiconducting properties as well as conducting properties. It is well known alumina (Al2O3) dominates the dielectric market as an integrating substrate or device carrier in electronics packaging. BN, AlN, SiC and diamond are also of interest, due to the thermal coefficient of expansion (TCE) and for the dielectric constant and higher thermal conductivity than that of Al2O3. SiC, AlN, BN, GaN and diamond also exhibit a wide-band gap and chemical resistance as well as exhibiting properties from a semiconductor to an insulator. These properties are of substantial interest for high temperature applications approaching 1000° C. and for aggressive environment applications. In addition, these properties are desirable for high density integrated circuit packing.
In the prior art, metallization methods, including dry-film imaging and screen printing have been used for the production of conductive patterns on alumina. However, metal compatibility difficulties with high thermal conductivity ceramic materials such as AlN and SiC, have not been completely solved. Copper and silver paste exhibits a TCE mismatch aggravated by high temperatures as well as being subject to oxidation that increases the resistivity. In particular, bonding of copper to AlN has proved to be nontrivial. Alumina or stoichiometric aluminum oxynitride (AlON) coatings must be developed on the AlN surface through passivation processes. These passivation processes have poor reproducibility. Thus, the direct laser synthesis of conductors in AlN, SiC and diamond substrates appears to provide solutions to this long standing prior art problem with regard to metallization and for more simple processing techniques for creating devices and circuitry that are compatible with selected ceramic substrates, while satisfying the need for higher temperature, aggressive environment, and higher density integrated circuit packaging applications. The following U.S. patents illustrate apparatuses and methods represent some of the attempts of the prior art for developing conductor and semiconductor components.
U.S. Pat. No. 5,906,708 to Robinson et al discloses silicon-germanium-based compositions comprising silicon, germanium, and carbon (Si—Ge—C), methods for growing Si—Ge—C epitaxial layer(s) on a substrate, etchants especially suitable for Si—Ge—C etch-stops, and novel methods of use for Si—Ge—C compositions. In particular, the invention relates to Si—Ge—C compositions, especially for use as etch-stops and related processes and etchants useful for microelectronic and nanotechnology fabrication.
U.S. Pat. No. 5,961,877 to Robinson et al discloses silicon-germanium-based compositions comprising silicon, germanium, and carbon Si—Ge—C, methods for growing Si—Ge—C epitaxial layer(s) on a substrate, etchants especially suitable for Si—Ge—C etch-stops, and novel methods of use for Si—Ge—C compositions. In particular, the invention relates to Si—Ge—C compositions, especially for use as etch-stops and related processes and etchants useful for microelectronic and nanotechnology fabrication.
U.S. Pat. No. 6,064,081 to Robinson et al discloses silicon-germanium-based compositions comprising silicon, germanium, and carbon (Si—Ge—C), methods for growing Si—Ge—C epitaxial layer(s) on a substrate, etchants especially suitable for Si—Ge—C etch-stops, and novel methods of use for Si—Ge—C compositions. In particular, the invention relates to Si—Ge—C compositions, especially for use as etch-stops and related processes and etchants useful for microelectronic and nanotechnology fabrication.
U.S. Pat. No. 6,221,154 to Lee et al. discloses a method and an apparatus developed to grow beta-silicon carbide nanorods, and prepare patterned field-emitters using different kinds of chemical vapor deposition methods. The apparatus includes graphite powder as the carbon source, and silicon powder as silicon sources. Metal powders (Fe, Cr and/or Ni) are used as catalyst. Hydrogen was the only feeding gas to the system.
U.S. Pat. No. 6,274,234 to Dujardin et al. discloses atomic wires of great length and great stability formed on the surface of a SiC substrate as straight chains of dimers of an element chosen from amongst SiC and C. In order to produce same, layers of the element are formed on the surface and the assembly is constructed by means of annealings of the surface provided with the layers. The resulting wires have application to nanoelectronics.
U.S. Pat. No. 6,313,015 to Lee et al. discloses silicon nanowires and silicon nanoparticle chains formed by the activation of silicon monoxide in the vapor phase. The silicon monoxide source may be solid or gaseous, and the activation may be by thermal excitation, laser ablation, plasma or magnetron sputtering. The present invention produces large amounts of silicon nanowires without requiring the use of any catalysts that may cause contamination.
U.S. Pat. No. 6,334,939 to Zhou et al. discloses a nanostructure based material capable of accepting and reacting with an alkali metal such as lithium. The material exhibits a reversible capacity ranging from at least approximately 900 mAh/g-1,500 mAh/g. The high capacity of the material makes it attractive for a number of applications, such as a battery electrode material.
U.S. Pat. No. 6,407,443 to Chen et al. discloses a method for forming a platen useful for forming nanoscale wires for device applications comprising: (a) providing a substrate having a major surface; (b) forming a plurality of alternating layers of two dissimilar materials on the substrate to form a stack having a major surface parallel to that of the substrate; (c) cleaving the stack normal to its major surface to expose the plurality of alternating layers; and (d) etching the exposed plurality of alternating layers to a chosen depth using an etchant that etches one material at a different rate than the other material to thereby provide the surface with extensive strips of indentations and form the platen useful for molding masters for nano-imprinting technology. The pattern of the platen is then imprinted into a substrate comprising a softer material to form a negative of the pattern, which is then used in further processing to form nanowires. The nanoscale platen thus comprises a plurality of alternating layers of the two dissimilar materials, with the layers of one material etched relative the layers of the other material to form indentations of the one material. The platen is then oriented such that the indentations are perpendicular to a surface to be imprinted.
In the prior United States patents of one of the inventors of the present invention, Dr. Nathanial R. Quick disclosed various processes for forming diverse types of apertures or vias, conductors, semiconductors, insulators and semiconductor components within a wide band gap semiconductor substrate. Many of these processes incorporated the laser synthesis of a wide-bandgap semiconductor substrate.
The prior patents of Dr. Nathanial R. Quick include the following United States Letters Patent, namely U.S. Pat. Nos. 5,145,741, 5,391,841, 5,837,607, 6,025,609, 6,054,375 and 6,271,576.
It is a primary object of the present invention to provide further process for fabricating semiconductor components based on the previous inventions of Dr. Nathanial R. Quick.
Another object of this invention is to provide an improved process for fabricating semiconductor components that locates a component and orients the semiconductor components
Another object of this invention is to provide an improved process for fabricating semiconductor components such as diodes, field effect transistors and the like.
Another object of this invention is to provide an improved process for fabricating semiconductor components with enhanced high frequency and high power performance.
The foregoing has outlined some of the more pertinent objects of the present invention. These objects should be construed as being merely illustrative of some of the more prominent features and applications of the invention. Many other beneficial results can be obtained by modifying the invention within the scope of the invention. Accordingly other objects in a full understanding of the invention may be had by referring to the summary of the invention and the detailed description describing the preferred embodiment of the invention.